SN54LV132A Datasheet | Texas Instruments

Features - 1 2-V to 5.5-V VCC Operation - Max tpd of 9 ns at 5 V - Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C - Support Mixed-Mode Voltage Operation on All Ports - Latch-Up Performance Exceeds 250 m A per JESD 17 - Ioff Supports Live Insertion, Partial Power-Down Mode, and Back Drive Protection - ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) 2 Applications - Industrial PC: Rugged PC and Laptop - Access Control and Security: Camera Surveillance IP Network - Vending, Payment and Change Machines - Patient Monitoring STB / DVR / Streaming Media (Withdraw) - Other Motor Drives (Such as Switch Reluctance) 3 Description The 'LV132A devices are quadruple positive-NAND gates designed for 2-V to 5.5-V VCC operation. The 'LV132A devices perform the Boolean function Y = A - B or Y = A + B in positive logic. Each circuit functions as a NAND gate, but because of the Schmitt trigger, it has different input threshold levels for positive- and negative-going signals. These circuits are temperature pensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SOIC (14) 8.65 mm × 3.91 mm LV132A SOP (14) SSOP (14) 10.30 mm × 5.30...